1 ps8706a 10/22/04 features ? low voltage operation v cc = 3.3v ? 1:16 fanout ? differential input can accept the following: lvds, lvpecl, lvhstl, sstl, hcsl ? translates any single-ended input signal to 3.3v lvpecl levels with a resistor bias on nclk input ? pin-to-pin compatible to ics8530-01 ? low output skew: 75ps ? part-to-part skew: 250ps ? propagation delay: 2ns ? maximum output frequency: 500mhz ? 3.3v output operating supply ? packaging (pb-free & green available): - 48-pin lqfp (fb) description the pi6c48530-01 is a high performance low skew lvpecl fanout buffer. pi6c48530-01 features a single differential lvpecl or lvds or lvhstl or sstl or hcsl input, and sixteen 3.3v lvpecl outputs. the input can accept a single-ended signal with external bias circuit. the large fanout from a single input line reduces loading on input clock. pi6c48530-01 is ideal for both single-ended to lvpecl translations and/or lvpecl clock distribution. typical applications are clock and signal distribution for data-communications and telecommunications. block diagram pin description pi6c48530-01 3.3v 1:16 lvpecl fanout buffer clk v cc o nq0 q0 nq1 q1 v ee nq2 q2 nq3 q3 v cc o v cc 0 q1 1 nq1 1 q10 nq10 v ee q9 nq9 nq8 q8 v cc o v cc v cc v cc o q7 nq7 q6 nq6 v ee q5 nq5 q4 nq4 v cc o v cc 0 nq12 q12 nq13 q13 v ee nq14 q14 nq15 q15 v cc o nclk 48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 q15 nq15 q14 nq14 q13 nq13 q12 nq12 q1 1 nq1 1 q10 nq10 q9 nq9 q8 nq8 q0 nq0 q1 nq1 q2 nq2 q3 nq3 q4 nq4 q5 nq5 q6 nq6 q7 nq7 clk nclk
2 ps8706a 10/22/04 pi6c48530-01 3.3v 1:16 lvpecl fanout buffer pin description name pin # type description v cco 1, 11, 14, 24, 25, 35, 38, 48 p output supply, connect to 3.3v q11, nq11 2, 3 o differential output pair, 3.3v lvpecl interface level. q12, nq12 4, 5 o differential output pair, 3.3v lvpecl interface level. v ee 6, 19, 30, 43 p ground, connect to negative supply q9, nq9 7, 8 o differential output pair, 3.3v lvpecl interface level. q8, nq8 9, 10 o differential output pair, 3.3v lvpecl interface level. v cc 12, 13 p core power supply, connect to 3.3v. q7, nq7 15, 16 o differential output pair, 3.3v lvpecl interface level. q6, nq6 17, 18 o differential output pair, 3.3v lvpecl interface level. q5, nq5 20, 21 o differential output pair, 3.3v lvpecl interface level. q4, nq4 22, 23 o differential output pair, 3.3v lvpecl interface level. q3, nq3 26, 27 o differential output pair, 3.3v lvpecl interface level. q2, nq2 28, 29 o differential output pair, 3.3v lvpecl interface level. q1, nq1 31, 32 o differential output pair, 3.3v lvpecl interface level. q0, nq0 33, 34 o differential output pair, 3.3v lvpecl interface level. clk 36 i_pd non-inverting differential clock input nclk 37 i_pu inverting differential clock input q15, nq15 39, 40 o differential output pair, 3.3v lvpecl interface level. q14, nq14 41, 42 o differential output pair, 3.3v lvpecl interface level. q13, nq13 44, 45 o differential output pair, 3.3v lvpecl interface level. q12, nq12 46, 47 o differential output pair, 3.3v lvpecl interface level. notes : 1. i = input, o = output, p = power supply connection, i_pd = input with pull down, i_pu = input with pull up
3 ps8706a 10/22/04 pi6c48530-01 3.3v 1:16 lvpecl fanout buffer pin characteristics symbol parameter conditions min typical max units c in input capacitance 4 pf r_pullup input pullup resistance 50 k? r_pulldown input pulldown resistance 50 k? clock input function table inputs outputs input to output mode polarity clk nclk q0:q15 nq0:nq15 0 1 low high differential to differential non inverting 1 0 high low differential to differential non inverting 0 biased; v in = v cc /2 low high single ended to differential non inverting 1 biased; v in =v cc /2 high low single ended to differential non inverting biased; v in = v cc /2 0 high low single ended to differential inverting biased; v in = v cc /2 1 low high single ended to differential inverting
4 ps8706a 10/22/04 pi6c48530-01 3.3v 1:16 lvpecl fanout buffer absolute maximum ratings symbol parameter conditions min typ max units v cc , v cco supply voltage referenced to gnd 4.6 v v in input voltage referenced to gnd -0.5 v cc + 0.5v v v out output voltage referenced to gnd -0.5 v cco + 0.5v v t stg storage temperature -65 150 o c notes: 1. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifca - tions only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the specifcations is not implied. exposure to absolute maximum rating conditions for extended periods may af fect product reliability. operating conditions symbol parameter conditions min typ max units v cc power supply voltage 3 3.3 3.6 v v cco output power supply 3 3.3 3.6 v t a ambient temperature 0 70 o c i cc power supply current 120 ma differential inputs dc characteristics t a = 0 o c to 70 o c, v cc = v cco = 3.0v to 3.6v unless otherwise stated below. symbol parameter conditions min typ max units i ih input high current nclk v in = v cc = 3.6v 5 ua clk v in = v cc = 3.6v 150 i il input low current nclk v cc = 3.6v, v in = 0v -150 clk v cc = 3.6v, v in = 0v -5 v pp peak-to-peak voltage clk, nclk 0.15 1.3 v v cmr common mode input voltage (1,2) clk, nclk v ee + 0.05 v cc - 0.85 notes : 1. for single ended applications, the maximum input voltage for clk and nclk is vcc+0.3v 2. common mode voltage is defned as v ih .
5 ps8706a 10/22/04 pi6c48530-01 3.3v 1:16 lvpecl fanout buffer lvpecl dc characteristics t a = 0 o c to 70 o c, v cc = v cco = 3.0v to 3.6v unless otherwise stated below. symbol parameter conditions min typ max units v oh output high voltage (3,4) v cco -1.4 v cco -1.0 v v ol output low voltage (3,4) v cco -2.0 v cco -1.7 v swing peak-to-peak output voltage swing 0.6 0.85 notes: 3. the pi6c48530-01 is designed to meet these specifcations after thermal equilibrium has been established. the circuit is in a test socket, or mounted on a printed circuit board. 4. q0:q15 and nq0:nq15 outputs are loaded with 50? to v cco -2v. ac characteristics t a = 0 o c to 70 o c, v cc = v cco = 3.0v to 3.6v unless otherwise stated below. symbol parameter conditions min typ max units f max output frequency 500 mhz t pd propagation delay (5) f 500mhz 1 2 ns tsk(o) output-to-output skew (6,8) 75 ps tsk(pp) part-to-part skew (7,8) 88 250 t r /t f output rise/fall time 20% - 80% @ 50mhz 300 700 t dc output duty cycle 48 52 % notes: 5. measured from the differential input crossing point to the differential output crossing point 6. defned as skew between outputs at the same supply voltage and with equal load condition. measured at the outputs dif ferential crossing point. 7. defned as skew between outputs on different parts operating at the same supply voltage and with equal load condition. measured at the out - puts differential crossing point. 8. this parameter is defned in accordance with jedec standard 9. all parameters are measured at 250mhz unless noted otherwise
6 ps8706a 10/22/04 pi6c48530-01 3.3v 1:16 lvpecl fanout buffer ordering information ordering code packaging code package type pi6c48530-01fb fb 48 pin lqfp PI6C48530-01FBE fb pb-free & green, 48 pin lqfp notes: 1. thermal characteristics can be found on the company web site at www .pericom.com/packaging/ pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com package mechanical: 48-pin lqfp (fb) seating plane gauge plane 0.45 0.75 0.09~0.20 0.05 0.15 0.25 mm 0 7 0.10 c 0.17 0.27 0.50 bsc 1.45 1.35 1.60 max 1.00 re f 9.00 bsc 7.00 bsc 7.00 bsc 9.00 bsc
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